IP -核心 FPGA & ASIC

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Overview

JPEG XS compression IP-cores for HD, 4K and 8K
At the speed of light!

intoPIX has developed various optimized TicoXS architectures running a different pixel per clock to target a wide range of resolutions and a wide range of FPGA devices & ASIC technology nodes.

Tico-XS is a revolutionary compression technology, standardized as JPEG XS, extremely tiny in FPGA & ASIC. It fits into the smallest Xilinx (by AMD) & Intel devices, it is robust for real-time operation with no latency. It offers a very low gate count & SRAM consumption in ASICs.

IP-cores Features

图像/视频功能	颜色空间：任何（RGB、YCbCr、YUV、XYZ） Color Sampling: 4:2:2, 4:4:4, 4:0:0 (monochrome, Alpha); 4:2:0* and 4:2:2:4* BIT DEPTH : 8, 10, 12, 14, 16 隔行扫描 + 渐进框架 Resolutions: Any (SD, HD, 2K, 4K, 8K) HDR ( & SDR ) support Frame Rates: Regular and High Frame Rates (depending on intoPIX IP-core configuration & targeted device). For Real-time video and High speed video (up to more than 1000 fps)
TicoXS Compression (Latency, Quality, Rate Control)	（子）内架 JPEG XS compliant (ISO/IEC 21122-1) , including coding profiles such as High444.12, MLS.12 , etc. 实时操作保证（无溢流或下溢）固定延迟 - 只有几行像素（行数取决于配置文件） Adjustable compression rate for lossy / visually lossless (down to 1.5 bpp**) / near-lossless / math. lossless Full transparency to uncompressed down to 3 bits per pixel (bpp) CBR (constant bit rate) operation - Adjustable down to 36:1 (1bpp) Optional Add-On: embedded x1 (1/4) and x2 (1/16) downscaler / proxy in decoder Optional intoPIX "Flawless Imaging" profile for KVM, AVoIP, PC applications. See TicoXS FIP solutions
FPGA / ASIC 实现	在任何FPGA中实现低成本：非常低 FPGA 逻辑和内部 RAM 使用（无需外部 DDR） Running in the smallest Xilinx (AMD) Spartan-6, Spartan-7 Artix-7, Kintex-7 and Ultrascale , Ultrascale Plus, Zynq, Versal Running in the smallest Intel Cyclone V, Arria V, Stratix V, Cyclone 10, Arria 10, Stratix 10 Running in the smallest Lattice FPGAs 低门面积（低门数/内存低）用于 ASIC 编码器和解码器的复杂性大致相同 IP-核大小、性能、视频分辨率和每秒最大帧数--可根据应用程序进行自定义*。 Various pixel per clock architectures

* via 4:2:2 plus alpha channel

**Depending on type of content and resolutions.

NEW configurations for FPGA & ASIC

基于我们支持的所有功能，可以提供自定义版本，以满足您的特定需求。

联系我们了解您自己的配置。

请看下面的典型配置清单。

IP-CORES 示例 -编码 / -解码。	最大*电阻	最大*帧数	颜色采样	BIT DEPTH	Minimum frequency***
IPX- TICO -XS-高清-60-422	1920 x 1080	60	4:2:2 / 4:0:0	8, 10, 12	45 MHz
IPX- TICO -XS-高清-60-444	1920 x 1080	60	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	60 MHz
IPX-TICO-XS-HD-240-444 新！	1920 x 1080	240	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	240 MHz
IPX-TICO-XS-HD-480-444 新!	1920 x 1080	480	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	240 MHz
IPX-TICO-XS-HD-1920-422 NEW!	1920 x 1080	1920	4:2:2 / 4:0:0	8, 10, 12	300兆赫
IPX-TICO-XS-4K-30-444	4096 x 2160	30	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	120 Mhz
IPX- TICO -XS-4K-60-422	4096 x 2160	60	4:2:2 / 4:0:0	8, 10, 12	150兆赫
IPX- TICO -XS-4K-60-444	4096 x 2160	60	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	240 MHz
IPX-TICO-XS-4K-120-422	4096 x 2160	120	4:2:2 / 4:0:0	8, 10, 12	300兆赫
IPX-TICO-XS-4K-120-444	4096 x 2160	120	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	240 MHz
IPX-TICO-XS-4K-480-422 NEW!	4096 x 2160	480	4:2:2 / 4:0:0	8, 10, 12	300兆赫
IPX-TICO-XS-8K-60-422 NEW!	7680x4320	60	4:2:2 / 4:0:0	8, 10, 12	150兆赫
IPX-TICO-XS-8K-60-444 NEW!	7680x4320**	60	4:4:4 / 4:2:2 / 4:0:0	8, 10, 12	240 MHz
IPX-TICO-XS-8K-120-422 新!	7680x4320	120	4:2:2 / 4:0:0	8,10, 12	300兆赫

* "Max" means it supports any standard video resolutions and frame rates below.
**8192x4320 on request
*** various pixels per clock architectures available

What our users say

ITS

“Thanks to the intoPIX JPEG XS FPGA cores, all of our NetVIDxs products offer visually lossless compression and super low latency”

Paul Hightower, CEO

Appear TV

"With the quality of uncompressed video, a sub 1ms latency video codec. There is no longer delays in contribution links for live production”

Carl Walter Holst, CEO

媒体链接

"Technology is poised to unleash a new level of low-latency connectivity that will transform the way we make live remote production today"

Mark Podesla, Senior Manager

Macnica

"With TICO-XS, we’re delivering performances with very low power draw, which makes the cost savings at scale even higher

Andrew Starks, Director of Product Management

Village Island

“ Amazingly, the XS doesn’t take more FPGA resource than the TICO RDD35, so we can move forward consolidating on our achievements with VICO so far. As a strong believer in the XS, we happily decided to make the move”

said Michael Van Dorpe, CEO

Riedel

“For broadcasters who want to create full IP workflows and truly replace uncompressed video and SDI, intoPIX JPEG-XS is an outstanding solution enabling to transmit video without losing image quality, with less than 1 millisecond of latency. This intoPIX technology enabled us to achieve a true breakthrough with our MuoN devices: with 64 JPEG-XS encoders per RU, our solutions now boast the highest density on the market”

Renaud Lavoie, Managing Director